The massive hardware demands of artificial intelligence (AI) applications are stretching the physical and structural limitations of semiconductors. But researchers have engineered a three-dimensional silicon chip that they propose as the solution.
In a new study published May 27 in the journal Nature, scientists found a way to cram more computing power into a chip by stacking silicon circuits in multiple layers in a way that doesn't impact performance.
Stacking chips vertically, known as 3D integration, is more efficient than traditional 2D chips, where silicon circuits are spread across a single surface. This is because stacking shortens the distance that data has to travel and reduces the power required for data transmission.
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