Samsung has developed a new prototype NAND memory chip composed of an incredible 900 layers, according to a new report. The chip is actually achieved by stacking two 450-layer cell wafers.
ET News (via Sammobile) says, "Samsung Electronics recently implemented a 900-layer Class V-NAND integrated system utilizing Cell Multi-Bonding (CMB) technology, which bonds two 450-layer cell wafers into one."
The outlet says that the current highest layer count for NAND flash memory is SK Hynix's 321-layer NAND technology. Samsung is said to be prepping its own 10th Gen V-NAND with over 400 layers and this new 900-layer prototype seems to be bonding two of that class of NAND chip together.
The challenge here, as we understand it, involves the intricacies of bonding chips together, which include the incredible precision required to align the cell wafers ...
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